A typical transistor switching regulator provides a well-regulated output DC voltage from an unregulated input DC voltage. Periodically, an unregulated input DC voltage is coupled to a conventional LC output filter of the switching regulator which develops the output DC voltage. Thus, a pulse modulated, unregulated DC voltage is applied to the output filter. Regulation of the duty cycle of the periodic switching of the input DC voltage to the output filter provides for regulation of the output DC voltage. For example, when a load being driven by the switching regulator is drawing a relatively low current from the output filter, the duty cycle of the periodic switching of the input DC voltage to the output filter need only be relatively small to maintain a constant charge on the output capacitor of the LC filter thereby keeping the output DC voltage regulated. Conversely, when the load is drawing a relatively high current from the output filter, the duty cycle of the periodic switching of the input DC voltage to the output filter will need to be large to maintain the output voltage in regulation. Usually, the duty cycle is determined from a comparison of the output DC voltage and a reference voltage
Most known transistor switching regulators operate at a frequency between 20 kHz and 50 kHz. This frequency range is selected to be above audio frequencies to minimize audible hum emanating from the switching regulator. The upper limit of the frequency range is determined by the turn-on and turn-off times of the transistor switch used for the periodic switching of the input DC voltage to the output filter. Since a transistor switch cannot instantaneously switch between substantially zero resistance in its on state to a very large resistance in its off state, it momentarily operates in a linear range during the time that it is switching between these two states. During these transitions, the transistor switch dissipates power from the resistive losses of the current through the transistor switch. As long as the turn-on and turn-off transition times of the transistor switch are relatively small with respect to the frequency of the switching, and especially with respect to the on portion of the duty cycle of the transistor switch, the dissipative power losses, although undesirable, are relatively insignificant. For example, a typical bipolar transistor switch has turn-on and turn-off transition times on the order of 100-200 nanoseconds, which are relatively insignificant even when compared to the 20 microsecond time period of a 50 kHz switching frequency.
Improvements in turn-on and turn-off transition times in this frequency range may be achieved by using a FET power switch, which consequently allows the FET switch to be operated at higher frequencies than a bipolar switch.
However, a FET switch cannot be arbitrarily operated at continually higher frequencies. As with bipolar transistor switches, the FET switch must be turned completely on into saturation, during the on portion of the duty cycle and must be completely turned off, i.e. into cutoff, during the off portion of the duty cycle to avoid operation in its linear power amplifier range wherein the channel resistance of the FET switch is dissipating power.
Because a power FET switch is characterized by a relatively high gate-source capacitance, the charging and discharging times of this capacitance limit the turn-on and turn-off transition times of the FET switch, and thereby determine the highest practical frequency of the periodic switching. At arbitrarily higher frequencies, the efficiency of the FET switching regulator is seriously and unacceptably degraded. In the extreme, the FET switching regulator may fail to keep the output voltage in regulation, or the FET switch itself will fail as a result of excessive heat from dissipative power losses in its channel.
However, it would be desirable to operate the FET switching regulator at a very high frequency, for example, on the order of 500 kHz. The desirability of operating a FET switching regulator at very high operational frequencies is two-fold. As the frequency of the pulse modulated, unregulated DC voltage applied to the output stage becomes higher, the value of the inductors and capacitors in the output filter may be correspondingly less. Consequently, these smaller inductances and capacitances provide advantages in reducing both the physical size of the output filter and in cost.
In order to increase the switching frequency of the FET switch by a factor of ten, from the usual highest practical frequency of 50 kHz to a more desirable 500 kHz, it is necessary to correspondingly decrease the turn-on and turn-off transition times of the FET switch. However, as stated above, these transistion times are limited by the relatively large gate-source capacitance of the FET switch. The gate of the FET switch, in known prior art switching regulators, is driven by a periodic waveform developed by a pulse-width modulator. The pulse-width modulator compares the output DC voltage to a reference voltage and applies a relatively constant voltage to the gate of the FET switch for a determined time during the on portion of the duty cycle. Such pulse-width modulators, although capable of developing periodic waveforms in the desired frequency range of approximately 500 kHz, are incapable of sufficiently driving the gate of the FET switch by rapidly charging and discharging the gate-source capacitor to obtain this operational frequency of the FET switching regulator.